in/out port numbers[solved]
in/out port numbers[solved]
So, i want to write something using in/out ports, but i don't know the ports number/functionality.
I've searched on the Google, but i haven't found any documentation about it .
Knows anyone such a documentation?
PS: I'm talking about I/O ports via inb / outb
I've searched on the Google, but i haven't found any documentation about it .
Knows anyone such a documentation?
PS: I'm talking about I/O ports via inb / outb
Last edited by eddyb on Mon Mar 03, 2008 5:32 am, edited 2 times in total.
maybe u have a Google manual ?
only thing i got is a pdf, where it's a list of the ports. but it's not clearly...
and with functionality,=>what can i do with that port(read a value, write a value, and what does this value)
PS: sorry for my english
only thing i got is a pdf, where it's a list of the ports. but it's not clearly...
and with functionality,=>what can i do with that port(read a value, write a value, and what does this value)
PS: sorry for my english
Last edited by eddyb on Mon Mar 03, 2008 5:32 am, edited 2 times in total.
Seems like they are looking for a list of standard/common ports.
The best you can really do is piece together such information from multiple sources. Also, and IIRC, RBIL has some of that information centralized, much like the Interrupt numbers/functions.
Other than that, what is connected on the other end of that port and how to communicate with it is another story altogether and is usually resolved by reading device-specific documentation.
The best you can really do is piece together such information from multiple sources. Also, and IIRC, RBIL has some of that information centralized, much like the Interrupt numbers/functions.
Other than that, what is connected on the other end of that port and how to communicate with it is another story altogether and is usually resolved by reading device-specific documentation.
Something like that, but not INTs. just something like thatSpooK wrote:Seems like they are looking for a list of standard/common ports.
Code: Select all
0x01 write registers for .......
bit 0 -> general compatibility
bit 1 -> .............................etc
when bit 2 is 0 then-> computer crash, etc
...
- os.hacker64
- Member
- Posts: 149
- Joined: Mon Feb 11, 2008 4:43 pm
- Location: Limbo City,Afterlife
i don't understand what are u referring...os.hacker64 wrote:I want to get info on reading a SATA drive with LBA28 or is it the same as PATA?
i'll try with google, but the problem is it gives me many results that doesn't fit with i searching. maybe i don't use the right keywords. can u suggest something that give acceptable results?
- os.hacker64
- Member
- Posts: 149
- Joined: Mon Feb 11, 2008 4:43 pm
- Location: Limbo City,Afterlife
You guys seems to be looking for the following:
http://www.intel.com/design/chipsets/G3 ... tation.htm
(for I/O ports and stuff)
And:
http://www.t13.org/Documents/UploadedDo ... lume_1.pdf
http://www.t13.org/Documents/UploadedDo ... lume_2.pdf
http://www.t13.org/Documents/UploadedDo ... lume_3.pdf
(for the ATA commands to write to those ports)
This documents of course contains an ocean of irrelevant information for your purposes though...
http://www.intel.com/design/chipsets/G3 ... tation.htm
(for I/O ports and stuff)
And:
http://www.t13.org/Documents/UploadedDo ... lume_1.pdf
http://www.t13.org/Documents/UploadedDo ... lume_2.pdf
http://www.t13.org/Documents/UploadedDo ... lume_3.pdf
(for the ATA commands to write to those ports)
This documents of course contains an ocean of irrelevant information for your purposes though...
Re: in/out port numbers
It depends on what you want to read/write to. For example, I am currently working on PCI device enumeration. The document I am reading is from PCI-SIG and is called "PCI LOCAL BUS SPECIFICATION, REV 3.0", and in section "3.2.2.3.2" it says:
So in this case, the two "in/out" ports would be 0xCF8 and 0xCFC. Basically you just need to figure out what you want to work on, find the specs for it, and read the whole thing and actually understand it. Its a lot of work but research is half the fun, right?Two DWORD I/O locations are used to generate configuration transactions for PC-AT
compatible systems. The first DWORD location (CF8h) references a read/write register
that is named CONFIG_ADDRESS. The second DWORD address (CFCh) references a
read/write register named CONFIG_DATA.
After long searches, i've found this:
Please, no copy and pasting of full (copyrighted) documents. The snippet originally comes from VGADOC. The document quoted is VGAREGS.TXT, located inside this archive - Combuster
Sounds interesting...
But i don't know how is with these indexes. Can anyone explain how i can set the index?
Please, no copy and pasting of full (copyrighted) documents. The snippet originally comes from VGADOC. The document quoted is VGAREGS.TXT, located inside this archive - Combuster
Sounds interesting...
But i don't know how is with these indexes. Can anyone explain how i can set the index?
- Masterkiller
- Member
- Posts: 153
- Joined: Sat May 05, 2007 6:20 pm
There is no official list of I/O ports function, so there is no COMPLETE list. Anyway many sites shows basic common functions mapped to I/O port like This one.
In short I/O bus is the same as Address and Data processor bus, but you can access up to 16-bit address number (so there are 65536 I/O ports). When you use IN or OUT instruction the number from DX register or immediate byte is placed to address bus and the contents or rAX register (depends on the size of the instruction) is placed on data bus. I/O pin is asserted so memory controller ignored the data from busses and I/O controller takes its place. Depends on the address, I/O controller try to read/write to a register placed on a chip in the motherboard or a device.
One chip can have many registers and because of the complexity of the computer system, 65536 addresses are not enough. Thats why for example VGA registers are mapped through an index. This means that I/O controller will not set a value to the target register directly. There is an index register and when the value of index register changes, the requested chip connects the target register to a special data register, without annoying the I/O controller. After that I/O controller can write data register to change the value of the target register. So with two I/O locations - Index and Data, you can access to thousand of registers. Just first write an index to index register and then read/write data register.
The I/O mapping addresses are just like memory addresses. If you have a dword value for example at address 0xCF8, you cannot have an another register at 0xCF9, because dword value is four bytes: 0xCF8, 0xCF9, 0xCFA, 0XCFB.
In short I/O bus is the same as Address and Data processor bus, but you can access up to 16-bit address number (so there are 65536 I/O ports). When you use IN or OUT instruction the number from DX register or immediate byte is placed to address bus and the contents or rAX register (depends on the size of the instruction) is placed on data bus. I/O pin is asserted so memory controller ignored the data from busses and I/O controller takes its place. Depends on the address, I/O controller try to read/write to a register placed on a chip in the motherboard or a device.
One chip can have many registers and because of the complexity of the computer system, 65536 addresses are not enough. Thats why for example VGA registers are mapped through an index. This means that I/O controller will not set a value to the target register directly. There is an index register and when the value of index register changes, the requested chip connects the target register to a special data register, without annoying the I/O controller. After that I/O controller can write data register to change the value of the target register. So with two I/O locations - Index and Data, you can access to thousand of registers. Just first write an index to index register and then read/write data register.
The I/O mapping addresses are just like memory addresses. If you have a dword value for example at address 0xCF8, you cannot have an another register at 0xCF9, because dword value is four bytes: 0xCF8, 0xCF9, 0xCFA, 0XCFB.
- AlfaOmega08
- Member
- Posts: 226
- Joined: Wed Nov 07, 2007 12:15 pm
- Location: Italy