Detecting 186 CPUs

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XCHG
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Detecting 186 CPUs

Post by XCHG »

As a part of our CPU detection unit, I am writing a series of CPU detection units that deal with pre-386 CPUs. I am detecting 8088/8086/80286/386+ but the problem is that there doesn't seem to be much official documentation about how 186 CPUs have to be detected. I read somewhere that in 186, if you push SP and then pop it into a 16-bit register such as AX, the value of AX with the new value of SP will not be the same. In other words, when SP is pushed onto the stack, the value of [SP]-2 is pushed onto the stack so when it is popped onto, say, AX, AX will be equal to the current SP-2. Is this true? Does anybody have any official document (dis)proving this?
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Post by Cemre »

Hi,

Best way to distinguish between 8086 and 80286 is to use FLAGS register bits 12 through 15.

on 8086, FLAGS[12..15] are always set.
on 80286, FLAGS[12..15] are always clear in real-mode.
I read somewhere that in 186, if you push SP and then pop it into a 16-bit register such as AX, the value of AX with the new value of SP will not be the same. In other words, when SP is pushed onto the stack, the value of [SP]-2 is pushed onto the stack so when it is popped onto, say, AX, AX will be equal to the current SP-2. Is this true?
That is true, when pushing the SP register, 8086 uses the decremented value, 80186 uses the value before decrementing SP. but as I know, it cannot be used for clear distinguishing, since non-intel vendors are not clear about this. all vendors for 80286+ will do it the same way anyway but the SP issue exists for 80186.

80186 is mostly same with 8086 with embedded market in mind. it has on-chip peripherals so that everything comes in one package ( dma, interrupt controller, timer etc... ) , no ALE pin ( address latch enable, 8086 users hate that CPU pin ) and following new instructions. AFAIK 80186 were not used much on personal computers.
Wikipedia wrote: ENTER Make stack frame for procedure parameters
LEAVE High-level procedure exit
PUSHA Push all general registers
POPA Pop all general registers
BOUND Check array index against bounds
UD2 Generate invalid opcode exception
INS Input from port to string
OUTS Output string to port
so by your detection method, if you conclude that cpu is not 286, you might simply try using those new instructions and check for an error by using CPU unknown-opcode interrupt handler to determine if it is a 8086 or 80186.

some sources are:

Wiki:
http://en.wikipedia.org/wiki/Intel_80186

Intel:
http://www.intel.com/design/intarch/prodbref/272222.htm
Last edited by Cemre on Tue Feb 05, 2008 4:14 pm, edited 2 times in total.
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Post by Combuster »

There are many sources for CPU detection, and many tests that can be done. Among them is indeed the SP test, but there are more tests that can tell cpu's apart without going for an exception.
The 8086/88 and 80186/188 had a bug in the PUSH SP microcode. The 8086 and 80186 stored the value of SP on the stack after it was decremented, instead of decrementing SP first and storing the resultant value on the stack. Any program that executed PUSH SP and a subsequent POP SP would not receive the same value for the PUSH/POP combination. Therefore, this well-documented difference is exploited to detect the difference in these families of processors.
But yes, I still have to come across this in an intel-signed document
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Post by Cemre »

Combuster wrote:but there are more tests that can tell cpu's apart without going for an exception.
I think I can safely conclude you have never used a try{}catch{} block in any of your codes.
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Post by Combuster »

It seems to me that you're actively trying to provoke flamewars.

To kick down the dungeon door: Don't post intential misinformation. Its the second time in a few days you posted something that goes directly against facts/consensus. Dont insult people. You have the right to remain silent.
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Post by Jef »

I really don't understand the reason to do detection for pre-386 cpus.
I cannot even find pre-Pentium cpus.
They exists only in museums.
Keep coding...
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Post by Combuster »

Jef wrote:I really don't understand the reason to do detection for pre-386 cpus.
I cannot even find pre-Pentium cpus.
They exists only in museums.
That'd make my room a large museum. Great.

Now I can charge my folks for entering my room :mrgreen:
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Post by Brynet-Inc »

Combuster wrote:
Jef wrote:I really don't understand the reason to do detection for pre-386 cpus.
I cannot even find pre-Pentium cpus.
They exists only in museums.
That'd make my room a large museum. Great.

Now I can charge my folks for entering my room :mrgreen:
I hear ya.. I own quite a few pre-Pentium systems myself... the oldest being a 286.

They're quite common here.. junk stores, garage sales.. etc.. ;)
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Post by Cemre »

Combuster wrote:It seems to me that you're actively trying to provoke flamewars.

To kick down the dungeon door: Don't post intential misinformation. Its the second time in a few days you posted something that goes directly against facts/consensus. Dont insult people. You have the right to remain silent.
It is your problem if you deny a known fact and says it is misinformation,

If there is anyone here doing anything for giving intentional misinformation, that is you, not me. Which word of anything I posted here has misinformation?

Seriously, what do you carry in that vase of yours that you carry over your shoulders? Learn to respect someone if they know better than you...
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Post by Tyler »

Cemre wrote:
Combuster wrote:It seems to me that you're actively trying to provoke flamewars.

To kick down the dungeon door: Don't post intential misinformation. Its the second time in a few days you posted something that goes directly against facts/consensus. Dont insult people. You have the right to remain silent.
It is your problem if you deny a known fact and says it is misinformation,

If there is anyone here doing anything for giving intentional misinformation, that is you, not me. Which word of anything I posted here has misinformation?

Seriously, what do you carry in that vase of yours that you carry over your shoulders? Learn to respect someone if they know better than you...
Hahahahahahahahahahahahahahahahahahahahahahaha (breathes)... hahahahahahahahahahahahahaha, aww man, if it's not enough that you are blatently attempting to flame an admin in the most stuck up way, you're actually completely ignorant of your own stupidity. Just drop it.

As for Pre-386 detection, the Flags method mentioned above is what i use in My bootloader, i have an old Compaq with a 8086 and it works fine. I'm pretty sure 80186 is basically the same processor.

EDIT: Actually, it might be an 8088... but still, the detection method is the same, external details (data bus size) shouldn't effect you.
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Post by mathematician »

I well remember push sp/pop sp being the source of a bug in one of my programs. It worked fine on my AT, but crashed when somebody tested it on their XT.
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Post by Jef »

Brynet-Inc wrote:
Combuster wrote:
Jef wrote:I really don't understand the reason to do detection for pre-386 cpus.
I cannot even find pre-Pentium cpus.
They exists only in museums.
That'd make my room a large museum. Great.

Now I can charge my folks for entering my room :mrgreen:
I hear ya.. I own quite a few pre-Pentium systems myself... the oldest being a 286.

They're quite common here.. junk stores, garage sales.. etc.. ;)
I have a Vegas 8088 WITH hand drive and WITH color monitor,
but i will never use it in the future. It just exists.
Keep coding...
...the sky is the limit

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Post by XCHG »

I really don't think trying to throw an exception by using instructions that are introduced on new processors is a good way since I am going to use this code in the MBR and I will not have enough space for code to handle the interrupts and exceptions.
Mathematician wrote:I well remember push sp/pop sp being the source of a bug in one of my programs. It worked fine on my AT, but crashed when somebody tested it on their XT.
How did it crash? Didn't you just PUSH SP into the stack and POP it into a 16-bit register? How could it crash?

Intel's website doesn't seem to be much of help since their manuals are updated according to changes in their most recent CPUs and chipsets so no dice yet in finding a manual written for 186.

I found this source that also states the method of using SP to detect 186! I think this is the most prominent way of detecting 186 CPUs since nobody seems to have official documentations stating how 186 CPUs have to be detected :(
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Post by Brendan »

Hi,
XCHG wrote:I think this is the most prominent way of detecting 186 CPUs since nobody seems to have official documentations stating how 186 CPUs have to be detected :(
Everybody here *should* have official Intel documentation that mentions that "PUSH SP" behaves differently on older CPUs... ;)
Intel's System Programming Guide wrote:18.14.1. PUSH SP

The P6 family, Pentium, Intel486, Intel386, and Intel 286 processors push a different value on the stack for a PUSH SP instruction than the 8086 processor. The 32-bit processors push the value of the SP register before it is decremented as part of the push operation; the 8086 processor pushes the value of the SP register after it is decremented. If the value is important, replace PUSH SP with the following three instructions:

Code: Select all

PUSH BP
MOV BP,SP
XCHG BP, [BP]
This code functions as the 8086 processor PUSH SP instruction on the P6 family, Pentium, Intel486, Intel386 and Intel 286 processors.
Some web pages you might like: Note: Be careful - code that is meant to distinguish between different Intel CPUs normally stuffs up when it's run on a "non-Intel" clone... ;)


Cheers,

Brendan
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Post by Combuster »

But as the OP mentioned, there's no reference to specifically the 80186 in intel's docs. Even in your snippet I observed that intel skips from the 8086 to the 286. :?
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