Can't get Interrupt working

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krisravn
Posts: 1
Joined: Fri Jan 18, 2008 9:04 am

Can't get Interrupt working

Post by krisravn »

I have been working to get interrupt working for some days now, but without much luck. Every time I produce an interrupt by typing a button, I have setting up my keyboard for interrupt(IRQ1), the OS crash(Triple Fault).
I think the problem is with my function pointer but I'm not sure. I also now that test_func1 can't be implemented in C, because it don't use IRET, but I have made an infinite wheel loop at the end, so I should print "hello world" and then going to a halt.
Im using Kubuntu Gutsy as development OS, with gcc. v 4.1.3 and Bochs x86 Emulator v. 2.3.

I appreciate everyone that wants to help me.

Here you have the code I think you need to look at:

gdt.h

Code: Select all

#include "types.h"

#ifndef _GDT_H
#define _GDT_H

#define NO_GDT 3

typedef struct x86_segment_descriptor {
  /* Lowest dword */
  word limit_15_0;            
  word base_address_15_0;  

  /* Highest dword */
  byte base_address_23_16; 
  byte segment_type:4;	/* code/data or system descriptor */
  
  byte descriptor_type:1;	/* 1=code/data segment, 0=system segment */ 
  byte descriptor_privilege_level:2;  /* Range: 0-3, 0: most priveleged, 3: lowest privileged */
  byte segment_present:1;	/* 1=segment present in memory, 0=not present */

  byte limit_19_16:4;         
  byte available:1;		/* No use specified, use it as you want! */
  byte zero:1;			/* Must be set to 0 */
  byte operation_size:1;	/* 1=32-bit code and data segment, 0=16-bit code and data segment (operand?)  */          
  byte granularity:1;  	/* 1=4kbyte, 0=byte*/     
  
  byte base_address_31_24; 
}__attribute__((packed, aligned (8))) x86_segment_descriptor_t;


typedef struct x86_gdt_register {
  word limit;
  dword base_address;
}__attribute__((packed, aligned(8))) x86_gdt_register_t;

void cpu_gdt_init();

#endif /* _GDT_H */
gdt.c

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#include "gdt.h"

static x86_gdt_register_t gdtr;
x86_segment_descriptor_t gdt_array[NO_GDT];

static void cpu_set_descriptor(x86_segment_descriptor_t *descriptor, dword base, dword limit, byte access, byte gran) {
  descriptor->limit_15_0 = (limit & 0xFFFF);
  descriptor->base_address_15_0 = (base & 0xFFFF);
  descriptor->base_address_23_16 = (base >> 16) & 0x0F;
  descriptor->segment_type = (access & 0x0F);
  descriptor->descriptor_type = (access >> 4) & 0x01;
  descriptor->descriptor_privilege_level = (access >> 5) & 0x03;
  descriptor->segment_present = (access >> 7) & 0x01;
  descriptor->limit_19_16 = (limit >> 16) & 0x0F;
  descriptor->available = 0;
  descriptor->zero = 0;
  descriptor->operation_size = 1;
  descriptor->granularity = gran;
  descriptor->base_address_31_24 = (base >> 24) & 0x0F;
}

static void __inline__ cpu_gdt_lgdt() {
  __asm__ __volatile__("lgdt %0	   ;"
		       "movw $0x10, %%ax   ;"
		       "movw %%ax,  %%ds   ;"
		       "movw %%ax,  %%es   ;"
		       "movw %%ax,  %%fs   ;"
		       "movw %%ax,  %%gs   ;"
		       "movw %%ax,  %%ss   ;"
		       "ljmp $0x08, $flush2;"
		       "flush2:		   ;"
		       :
		       :"m"(gdtr)
		       :"memory","eax");
}

void cpu_gdt_init() {  
  cpu_set_descriptor(&gdt_array[0], 0x00, 0x00, 0x00, 0x00);       //null descriptor
  cpu_set_descriptor(&gdt_array[1], 0x00, 0xFFFFFFFF, 0x9a, 0x01); //code descriptor
  cpu_set_descriptor(&gdt_array[2], 0x00, 0xFFFFFFFF, 0x92, 0x01); //data descriptor

  gdtr.base_address = (dword)&gdt_array;
  gdtr.limit = (sizeof(x86_segment_descriptor_t) * NO_GDT) - 1;

  cpu_gdt_lgdt();
}
idt.h

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#include "types.h"

#ifndef _IDT_H
#define _IDT_H

#define NO_IDT 256

typedef struct x86_interrupt_gate_descriptor {
  word offset_15_0;
  word selector;
  byte zero;
  byte gate_type:4;
  byte descriptor_type:1;
  byte descriptor_privilege_level:2;
  byte gate_present:1;
  word offset_31_16;
}__attribute__((packed, aligned (8))) x86_interrupt_gate_descriptor_t;

typedef struct x86_idt_register {
  word limit;
  dword base_address;
}__attribute__((packed, aligned(8))) x86_idt_register_t;

void cpu_idt_init();

#endif /* IDT_H */
idt.c

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#include "idt.h"
#include "gdt.h"
#include "screen.h"
#include "string.h"
#include "pic.h"
#include "io.h"

extern x86_segment_descriptor_t gdt_array[3];
static x86_idt_register_t idtr;
x86_interrupt_gate_descriptor_t idt_array[NO_IDT];

extern void _isr_wrapper();
extern void _keyboard_interrupt();

void test_func1() {
  write_string(0x07, "hello world");
  while(1);
}

//static void test_func1() {
//  __asm__ __volatile__("pushad");
//  write_string(0x07, "hello from interrupt");
//  //while(1);
//  __asm__ __volatile__("popad; leave; iret"); /* BLACK MAGIC! */
//}

static void cpu_set_descriptor(byte no, dword offset, byte access) {
  idt_array[no].offset_15_0 = offset & 0xFFFF;
  idt_array[no].selector = (word)&gdt_array[1];
  idt_array[no].zero = 0;
  idt_array[no].gate_type = access & 0x000F;
  idt_array[no].descriptor_type = (access >> 4) & 0x0001;
  idt_array[no].descriptor_privilege_level = (access >> 5) & 0x0003;
  idt_array[no].gate_present = (access >> 7) & 0x0001;
  idt_array[no].offset_31_16 = (offset >> 16) & 0xFFFF;
}

static __inline__ int irqEnabled() {
        int f;
        __asm__ __volatile__("pushf;popl %0"
			     :"=g" (f)
			     );
        return f & (1<<9);
}

static void __inline__ cpu_idt_lidt() {
  __asm__ __volatile__("lidt %0"
		       :
		       :"m"(idtr)
		       :"memory","eax"
		       );
}

void enable_irq(word irq)
{
  word ocw1 = 0xFFFF;
  
   ocw1 &= ~(1 << irq);   /* enable propriate bit with shifting to left
               invert the thing to enable the interrupt
               use AND operation to leave the other bits
               as they are
             */
   if (irq < 8)
     outb(ocw1&0xFF, PIC1_DATA);   /* AND with 0xFF to clear the high 8
                       bits because we send to PIC1
                   */
   else
     outb(ocw1 >> 8, PIC2_DATA);   /* move high 8 bits to low 8 bits
                     since we send to PIC2
                   */
}

void cpu_idt_init() {
  int i;
  pic_init();
  enable_irq(1);
  //for(i = 0; i < 16; i++) pic_eoi(i);
  //write_string(0x07, itoa(enable, Dec));
  for(i = 0; i < NO_IDT; i++)
    cpu_set_descriptor(i, (dword)&test_func1, 0x8E);
  idtr.base_address = (dword)&idt_array;
  idtr.limit = (sizeof(x86_interrupt_gate_descriptor_t) * NO_IDT) - 1; 
  cpu_idt_lidt();
  //write_string(0x07, itoa(enable, Dec));
}
pic.h

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#include "types.h"

#ifndef _PIC_H
#define _PIC_H

#define PIC1_COMMAND 0x20
#define PIC2_COMMAND 0xA0
#define PIC1_DATA    0x21
#define PIC2_DATA    0xA1

#define PIC_EOI      0x20
#define PIC_ICW1     0x11
#define PIC1_ICW3    0x04
#define PIC2_ICW3    0x02
#define PIC_ICW4     0x01

#define IRQ_0        0x20
#define IRQ_8        0x28

void pic_init();
void pic_eoi(byte irq);

#endif /* _PIC_H */
pic.c

Code: Select all

#include "pic.h"
#include "io.h"

void pic_eoi(byte irq) {
  if (irq >= 8)
    outb(PIC2_COMMAND, PIC_EOI);
  outb(PIC1_COMMAND, PIC_EOI);
}

void pic_init() {
  //send ICW1
  outb(PIC_ICW1, PIC1_COMMAND);
  io_wait();
  outb(PIC_ICW1, PIC2_COMMAND);
  io_wait();
  //send ICW2
  outb(IRQ_0, PIC1_DATA);
  io_wait();
  outb(IRQ_8, PIC2_DATA);
  io_wait();
  //send ICW3
  outb(PIC1_ICW3, PIC1_DATA);
  io_wait();
  outb(PIC2_ICW3, PIC2_DATA);
  io_wait();
  //send ICW4
  outb(PIC_ICW4, PIC1_DATA);
  io_wait();
  outb(PIC_ICW4, PIC2_DATA);
  io_wait();
  //retore masks
  outb(0, PIC1_DATA);
  outb(0, PIC2_DATA);
}
io.c

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#include "io.h"

__inline__ void outb(const byte value, const word port) {
  __asm__ __volatile__("outb %b0, %w1 ;"
		       :
		       :"a"(value), "d"(port)
		       );
}

__inline__ byte inb(const word port) {
  char value;

  __asm__ __volatile__("inb %w1, %b0 ;"
		       :"=a"(value)
		       :"d"(port)
		       );

  return value;
}

__inline__ void io_wait() {
  __asm__ __volatile__("jmp 1f;1:jmp 1f;1:");
}
kernel.c

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#include "multiboot.h"
#include "string.h"
#include "screen.h"
#include "mem.h"
#include "gdt.h"
#include "idt.h"
#include "interrupts.h"

void _main (multiboot_info_t* mbt, unsigned int magic) {
  clr_screen();
  _disable_interrupts();
  cpu_gdt_init();
  cpu_idt_init();
  _brk((void*) 0x400000);
  _enable_interrupts();
  //__asm__ __volatile__("int $50;");
  write_string(0x07, "<<<<Stoffer OS>>>>");

  __asm__ __volatile__("hlt ;");
  //while(1);
  write_string(0x07, "kernel termination");
}
output from bochs

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00000000000i[     ] Bochs x86 Emulator 2.3
00000000000i[     ]   Build from CVS snapshot on August 27, 2006
00000000000i[     ] System configuration
00000000000i[     ]   processors: 1 (cores=1, HT threads=1)
00000000000i[     ]   A20 line support: yes
00000000000i[     ]   APIC support: yes
00000000000i[     ] CPU configuration
00000000000i[     ]   level: 6
00000000000i[     ]   paging support: yes, tlb enabled: yes
00000000000i[     ]   SMP support: no
00000000000i[     ]   FPU support: yes
00000000000i[     ]   MMX support: yes
00000000000i[     ]   SSE support: 4
00000000000i[     ]   v8086 mode support: yes
00000000000i[     ]   VME support: yes
00000000000i[     ]   3dnow! support: yes
00000000000i[     ]   PAE support: yes
00000000000i[     ]   PGE support: yes
00000000000i[     ]   PSE support: yes
00000000000i[     ]   x86-64 support: yes
00000000000i[     ]   SEP support: yes
00000000000i[     ] Optimization configuration
00000000000i[     ]   Guest2HostTLB support: yes
00000000000i[     ]   RepeatSpeedups support: yes
00000000000i[     ]   Icache support: yes
00000000000i[     ]   Host Asm support: yes
00000000000i[     ]   Fast function calls: yes
00000000000i[     ] Devices configuration
00000000000i[     ]   NE2000 support: yes
00000000000i[     ]   PCI support: yes
00000000000i[     ]   SB16 support: yes
00000000000i[     ]   USB support: yes
00000000000i[     ]   VGA extension support: vbe 
00000000000i[MEM0 ] allocated memory at 0xaf8cb008. after alignment, vector=0xaf8cc000
00000000000i[MEM0 ] 128,00MB
00000000000i[MEM0 ] rom at 0xf0000/65536 ('/usr/share/bochs/BIOS-bochs-latest')
00000000000i[MEM0 ] rom at 0xc0000/38400 ('/usr/share/vgabios/vgabios.bin')
00000000000i[APIC?] set APIC ID to 0
00000000000i[APIC0] 80686
00000000000i[APIC0] local apic in CPU apicid=00 initializing
00000000000i[     ] lt_dlhandle is 0x8313718
00000000000i[PLGIN] loaded plugin libbx_unmapped.la
00000000000i[     ] lt_dlhandle is 0x8313be8
00000000000i[PLGIN] loaded plugin libbx_biosdev.la
00000000000i[     ] lt_dlhandle is 0x83141f0
00000000000i[PLGIN] loaded plugin libbx_cmos.la
00000000000i[     ] lt_dlhandle is 0x8314348
00000000000i[PLGIN] loaded plugin libbx_dma.la
00000000000i[     ] lt_dlhandle is 0x83148a8
00000000000i[PLGIN] loaded plugin libbx_pic.la
00000000000i[     ] lt_dlhandle is 0x8315280
00000000000i[PLGIN] loaded plugin libbx_vga.la
00000000000i[     ] lt_dlhandle is 0x8315780
00000000000i[PLGIN] loaded plugin libbx_floppy.la
00000000000i[     ] lt_dlhandle is 0x8315f40
00000000000i[PLGIN] loaded plugin libbx_harddrv.la
00000000000i[     ] lt_dlhandle is 0x83160d0
00000000000i[PLGIN] loaded plugin libbx_keyboard.la
00000000000i[     ] lt_dlhandle is 0x8327c20
00000000000i[PLGIN] loaded plugin libbx_serial.la
00000000000i[     ] lt_dlhandle is 0x8328d50
00000000000i[PLGIN] loaded plugin libbx_parallel.la
00000000000i[     ] lt_dlhandle is 0x83292d0
00000000000i[PLGIN] loaded plugin libbx_extfpuirq.la
00000000000i[     ] lt_dlhandle is 0x8329758
00000000000i[PLGIN] loaded plugin libbx_gameport.la
00000000000i[     ] lt_dlhandle is 0x8329c60
00000000000i[PLGIN] loaded plugin libbx_speaker.la
00000000000i[     ] lt_dlhandle is 0x832a148
00000000000i[PLGIN] loaded plugin libbx_pci.la
00000000000i[     ] lt_dlhandle is 0x832a2b8
00000000000i[PLGIN] loaded plugin libbx_pci2isa.la
00000000000i[     ] lt_dlhandle is 0x832aea8
00000000000i[PLGIN] loaded plugin libbx_pci_ide.la
00000000000i[     ] lt_dlhandle is 0x832b038
00000000000i[PLGIN] loaded plugin libbx_pciusb.la
00000000000i[IOAP ] initializing I/O APIC
00000000000i[IOAP ] set APIC ID to 1
00000000000i[MEM0 ] Register memory access handlers: fec00000-fec00fff
00000000000i[CMOS ] Using local time for initial clock
00000000000i[CMOS ] Setting initial clock to: Fri Jan 18 15:02:10 2008 (time0=1200664930)
00000000000i[DMA  ] channel 4 used by cascade
00000000000i[DMA  ] channel 2 used by Floppy Drive
00000000000i[FDD  ] fd0: 'kernel_floppy.img' ro=0, h=2,t=80,spt=18
00000000000i[PCI  ] 440FX Host bridge present at device 0, function 0
00000000000i[PCI  ] PIIX3 PCI-to-ISA bridge present at device 1, function 0
00000000000i[MEM0 ] Register memory access handlers: 000a0000-000bffff
00000000000i[VGA  ] interval=300000
00000000000i[MEM0 ] Register memory access handlers: e0000000-e07fffff
00000000000i[VGA  ] VBE Bochs Display Extension Enabled
00000000000i[PLGIN] init_mem of 'harddrv' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'keyboard' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'serial' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'parallel' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'gameport' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'speaker' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'pci_ide' plugin device by virtual method
00000000000i[PLGIN] init_mem of 'pciusb' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'harddrv' plugin device by virtual method
00000000000i[HD   ] CD on ata0-1: '/dev/cdrom'
00000000000i[CD   ] load cdrom with path=/dev/cdrom
00000000000e[CD   ] open cd failed for /dev/cdrom: No medium found
00000000000i[HD   ] Could not locate CD-ROM, continuing with media not present
00000000000i[HD   ] Using boot sequence floppy, none, none
00000000000i[HD   ] Floppy boot signature check is enabled
00000000000i[PLGIN] init_dev of 'keyboard' plugin device by virtual method
00000000000i[KBD  ] will paste characters every 1000 keyboard ticks
00000000000i[PLGIN] init_dev of 'serial' plugin device by virtual method
00000000000i[SER  ] com1 at 0x03f8 irq 4
00000000000i[PLGIN] init_dev of 'parallel' plugin device by virtual method
00000000000i[PAR  ] parallel port 1 at 0x0378 irq 7
00000000000i[PLGIN] init_dev of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'gameport' plugin device by virtual method
00000000000i[PLGIN] init_dev of 'speaker' plugin device by virtual method
00000000000i[SPEAK] Failed to open /dev/console: No such file or directory
00000000000i[SPEAK] Deactivating beep on console
00000000000i[PLGIN] init_dev of 'pci_ide' plugin device by virtual method
00000000000i[PCI  ] PIIX3 PCI IDE controller present at device 1, function 1
00000000000i[PLGIN] init_dev of 'pciusb' plugin device by virtual method
00000000000i[PCI  ] Experimental PCI USB present at device 1, function 2
00000000000i[USB  ] usb1 initialized - I/O base and IRQ assigned by PCI BIOS
00000000000i[PLGIN] register state of 'harddrv' plugin device by virtual method
00000000000i[PLGIN] register state of 'keyboard' plugin device by virtual method
00000000000i[PLGIN] register state of 'serial' plugin device by virtual method
00000000000i[PLGIN] register state of 'parallel' plugin device by virtual method
00000000000i[PLGIN] register state of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] register state of 'gameport' plugin device by virtual method
00000000000i[PLGIN] register state of 'speaker' plugin device by virtual method
00000000000i[PLGIN] register state of 'pci_ide' plugin device by virtual method
00000000000i[PLGIN] register state of 'pciusb' plugin device by virtual method
00000000000i[SYS  ] bx_pc_system_c::Reset(HARDWARE) called
00000000000i[APIC0] local apic in CPU 0 initializing
00000000000i[PLGIN] reset of 'harddrv' plugin device by virtual method
00000000000i[PLGIN] reset of 'keyboard' plugin device by virtual method
00000000000i[PLGIN] reset of 'serial' plugin device by virtual method
00000000000i[PLGIN] reset of 'parallel' plugin device by virtual method
00000000000i[PLGIN] reset of 'extfpuirq' plugin device by virtual method
00000000000i[PLGIN] reset of 'gameport' plugin device by virtual method
00000000000i[PLGIN] reset of 'speaker' plugin device by virtual method
00000000000i[PLGIN] reset of 'pci_ide' plugin device by virtual method
00000000000i[PLGIN] reset of 'pciusb' plugin device by virtual method
00000003740i[BIOS ] $Revision: 1.166 $ $Date: 2006/08/11 17:34:12 $
00000317563i[KBD  ] reset-disable command received
00000318691i[PIDE ] new BM-DMA address: 0xc000
00000318918i[USB  ] new base address: 0xc100
00000324560i[P2I  ] PCI IRQ routing: PIRQD# set to 0x0b
00000324576i[P2I  ] write: ELCR2 = 0x08
00000324596i[USB  ] new irq line = 11
00000443193i[VBIOS] VGABios $Id: vgabios.c,v 1.66 2006/07/10 07:47:51 vruppert Exp $

00000443264i[VGA  ] VBE known Display Interface b0c0
00000443296i[VGA  ] VBE known Display Interface b0c4
00000446221i[VBIOS] VBE Bios $Id: vbe.c,v 1.58 2006/08/19 09:39:43 vruppert Exp $
00003388759i[BIOS ] int13_harddisk: function 41, unmapped device for ELDL=80
00003393515i[BIOS ] int13_harddisk: function 08, unmapped device for ELDL=80
00003398157i[BIOS ] *** int 15h function AX=00C0, BX=0000 not yet supported!
00047264250e[CPU0 ] fetch_raw_descriptor: GDT: index (502f)a05 > limit (17)
00047264250e[CPU0 ] fetch_raw_descriptor: GDT: index (502f)a05 > limit (17)
00047264250e[CPU0 ] fetch_raw_descriptor: GDT: index (502f)a05 > limit (17)
00047264250i[CPU0 ] protected mode
00047264250i[CPU0 ] CS.d_b = 32 bit
00047264250i[CPU0 ] SS.d_b = 32 bit
00047264250i[CPU0 ] EFER   = 0x00000000
00047264250i[CPU0 ] | RAX=0000000000400000  RBX=000000000002bdc0
00047264250i[CPU0 ] | RCX=0000000000000008  RDX=0000000000000007
00047264250i[CPU0 ] | RSP=0000000000104ff8  RBP=0000000000105010
00047264250i[CPU0 ] | RSI=000000000002bf1f  RDI=000000000002bf20
00047264250i[CPU0 ] |  R8=0000000000000000   R9=0000000000000000
00047264250i[CPU0 ] | R10=0000000000000000  R11=0000000000000000
00047264250i[CPU0 ] | R12=0000000000000000  R13=0000000000000000
00047264250i[CPU0 ] | R14=0000000000000000  R15=0000000000000000
00047264250i[CPU0 ] | IOPL=0 id vip vif ac vm RF nt of df IF tf sf ZF af PF cf
00047264250i[CPU0 ] | SEG selector     base    limit G D
00047264250i[CPU0 ] | SEG sltr(index|ti|rpl)     base    limit G D
00047264250i[CPU0 ] |  CS:0008( 0001| 0|  0) 00000000 000fffff 1 1
00047264250i[CPU0 ] |  DS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00047264250i[CPU0 ] |  SS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00047264250i[CPU0 ] |  ES:0010( 0002| 0|  0) 00000000 000fffff 1 1
00047264250i[CPU0 ] |  FS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00047264250i[CPU0 ] |  GS:0010( 0002| 0|  0) 00000000 000fffff 1 1
00047264250i[CPU0 ] |  MSR_FS_BASE:0000000000000000
00047264250i[CPU0 ] |  MSR_GS_BASE:0000000000000000
00047264250i[CPU0 ] | RIP=0000000000100158 (0000000000100158)
00047264250i[CPU0 ] | CR0=0x00000011 CR1=0x0 CR2=0x0000000000000000
00047264250i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
00047264250i[CPU0 ] >> jmp .+0xfffffffe (0x00100158) : EBFE
00047264250e[CPU0 ] exception(): 3rd (13) exception with no resolution, shutdown status is 00h, resetting
00047264250i[SYS  ] bx_pc_system_c::Reset(SOFTWARE) called
00047264250i[APIC0] local apic in CPU 0 initializing
00047267990i[BIOS ] $Revision: 1.166 $ $Date: 2006/08/11 17:34:12 $
00047581790i[KBD  ] reset-disable command received
00047588642i[P2I  ] write: ELCR2 = 0x00
00047588680i[P2I  ] PCI IRQ routing: PIRQD# set to 0x80
00047588825i[P2I  ] PCI IRQ routing: PIRQD# set to 0x0b
00047588841i[P2I  ] write: ELCR2 = 0x08
00047707458i[VBIOS] 
VGABios $Id: vgabios.c,v 1.66 2006/07/10 07:47:51 vruppert Exp $

00047707529i[VGA  ] VBE known Display Interface b0c0
00047707561i[VGA  ] VBE known Display Interface b0c4
00047710486i[VBIOS] VBE Bios $Id: vbe.c,v 1.58 2006/08/19 09:39:43 vruppert Exp $
00048044093i[FDD  ] controller reset in software
00050654183i[BIOS ] int13_harddisk: function 41, unmapped device for ELDL=80
00050658939i[BIOS ] int13_harddisk: function 08, unmapped device for ELDL=80
00050663581i[BIOS ] *** int 15h function AX=00C0, BX=0000 not yet supported!
00077283000p[SDL  ] >>PANIC<< User requested shutdown.
00077283000i[SYS  ] Last time is 1200665007
00077283000i[CPU0 ] real mode
00077283000i[CPU0 ] CS.d_b = 16 bit
00077283000i[CPU0 ] SS.d_b = 16 bit
00077283000i[CPU0 ] EFER   = 0x00000000
00077283000i[CPU0 ] | RAX=0000000000000000  RBX=000000000001001e
00077283000i[CPU0 ] | RCX=0000000000001503  RDX=00000000ffffffff
00077283000i[CPU0 ] | RSP=0000000000001fda  RBP=0000000000001ff0
00077283000i[CPU0 ] | RSI=000000000001f1f5  RDI=0000000000000000
00077283000i[CPU0 ] |  R8=0000000000000000   R9=0000000000000000
00077283000i[CPU0 ] | R10=0000000000000000  R11=0000000000000000
00077283000i[CPU0 ] | R12=0000000000000000  R13=0000000000000000
00077283000i[CPU0 ] | R14=0000000000000000  R15=0000000000000000
00077283000i[CPU0 ] | IOPL=0 id vip vif ac vm rf nt of df IF tf sf ZF af PF cf
00077283000i[CPU0 ] | SEG selector     base    limit G D
00077283000i[CPU0 ] | SEG sltr(index|ti|rpl)     base    limit G D
00077283000i[CPU0 ] |  CS:f000( 0003| 0|  0) 000f0000 0000ffff 0 0
00077283000i[CPU0 ] |  DS:0040( 0004| 0|  0) 00000400 0000ffff 0 0
00077283000i[CPU0 ] |  SS:0000( 0004| 0|  0) 00000000 0000ffff 0 0
00077283000i[CPU0 ] |  ES:0000( 0004| 0|  0) 00000000 0000ffff 0 0
00077283000i[CPU0 ] |  FS:0000( 0004| 0|  0) 00000000 0000ffff 0 0
00077283000i[CPU0 ] |  GS:0000( 0004| 0|  0) 00000000 0000ffff 0 0
00077283000i[CPU0 ] |  MSR_FS_BASE:0000000000000000
00077283000i[CPU0 ] |  MSR_GS_BASE:0000000000000000
00077283000i[CPU0 ] | RIP=000000000000e860 (000000000000e860)
00077283000i[CPU0 ] | CR0=0x00000010 CR1=0x0 CR2=0x0000000000000000
00077283000i[CPU0 ] | CR3=0x00000000 CR4=0x00000000
00077283000i[CPU0 ] >> cli  : FA
00077283000i[     ] restoring default signal behavior
00077283000i[CTRL ] quit_sim called with exit code 1
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Combuster
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Post by Combuster »

Given the bochs dump, either your IDT is invalid, or you have messed up the stack somewhere. At the very least, you will need some assembler code to get interrupts working properly at all, as gcc does indeed not insert IRETDs.

To check the exact cause, start the bochs debugger and set breakpoints for the function that is to be called upon interrupt, and check if it is indeed called. You can generate a division by zero as well to test interrupt handling. If the function does not get called, your IDT is borked, and you should check its contents from the debugger. It has some useful commands to do so.
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