Lately i've been tinkering on the latest in my crazy line of maniacal microkernels. However, I have also moved out of home and as such, am stranded in a world without interweb access...
Yes, I know ... It must pain you to hear that a fellow developer is starved so severely of information that we all need to yknow, live and prosper and feel satisfied.
Anywho, Im in the process of rewriting the various levels Zenobit's bootloaders. Currently, Im replacing the memory detection. In the past, I simply probed memory - this was okay for determining the raw memory accessible in the machine itself. Obviously, it didnt account for the chunks of that memory that were used by devices.
So, Ive been poking around, looking at various solutions. One of those solutions is BIOS function $E820. That being said, I still have a few questions regarding its use.
They are:
+ This function will return base memory and ISA/PCI memory contiguous with base memory as normal memory ranges; it will indicate chipset-defined address holes which are not in use and motherboard memory-mapped devices, and all occurrences of the system BIOS as reserved; standard PC address ranges will not be reported (from Ralf Brown's Interrupt List).
? The question here is simple : What standard PC-address ranges does RB imply here? I figure Video RAM, BIOS (0xF0000-0x100000). Further information on this would be greatly appreciated.
+ If this function is not supported, an application should fall back to AX=E802h, AX=E801h, and then AH=88h.
? Okay, sure. However, this prompts several new questions...
+ AH=$88 returns a contiguous region of X KiB, from absolute address 1 MiB. Thats all well and dandy, except for the fact that we no longer have a clue which spaces in that region are actually being used for memory mapped devices. I figure in this case, we make intelligent guesses about what regions are in use by hardware - perhaps the 'standard pc address ranges' that RB talked about earlier?
+ AX=$E801
? This BIOS function returns the following:
CF clear if successful
AX = extended memory between 1M and 16M, in K (max 3C00h = 15MB)
BX = extended memory above 16M, in 64K blocks
CX = configured memory 1M to 16M, in K
DX = configured memory above 16M, in 64K blocks
CF set on error
Okay, I understand EXTENDED memory, No problem but what the hell is configured memory?
Keep your eyes peeled folks, as I have many more questions for another day (mostly revolving around Intel's DMAC and PIC). The questions about these chips isnt neccessarily about how to use them, but more how the address / instruction codes in their respective datasheets relate to the wiring on the PC motherboard.
For example, Our PCs have what? two DMACs? One 8bit, one 16bit? I can see that the 8bit DMAC is based at Port $0, as the Address line settings on the chip (specified on the datasheet) directly correspond to the ports we actually use to access the chip. The 16bit DMAC however, is based elsewhere.
Ie: When we send the DMA commands, various pins must be asserted - We are not asserting these pins (IOR, IOW, MEMR, MEMW etc...). Are these pins wired in such a way on our Motherboards that they fire correctly when we do port accesses?
Finally, according to the DMAC datasheet, the Software command codes are not transfered along the data bus / data lines but instead are signalled by specific address codes, in combination with specific IOR/IOW levels. How can we trigger these specific commands without controlling the IOR/IOW pins?
The OSRC (OS Resource Center) documents related to the DMAC dont really touch any of this... So, Id really appreciate any information here.
Thanks!
~Zeii [/b]
