The entire HAL is a middle man of sorts. It acts like a motherboard driver between the kernel, kernel level drivers, and the hardware.not a middle man function that then signals the driver.
The HAL's register function would need to update the entry in the IDT with the new address of the routine that is being registered. Because IRQ's and ISR's are stored within the same table, We don't need to change anything else.
I have not thought about shared interrupts though.
This is still a design-in-progress though I still have not found a nice way of loading the HAL with writing a hardware independent memory manager and file manager.
The problem is that of paging and memory management revolves around the hardware. However, placing hardware dependent code for memory management defies the purpose of the HAL in the first place. However, without proper memory management, we cannot have a file manager load programs at a virtual address, anywhere in memory. Thus, cannot load the HAL. (Unless we load it at a specific physical memory address, which is quite ugly.)
Any suggestions for this problem? :/