VGA Problem

[JAAman]

so are the other instructions... all of them are "pipelined", and all of them use the same 4 ALUs, and all for of them complete in the same 1/2 cycle in the ALU, meaning it isnt any slower than any other ALU instruction:

ADD
ADC
SUB
SBC
MUL
DIV
SHL
SHR

all take exactly the same procedure, and exactly the same number of cycles to execute

[Craze Frog]

so are the other instructions... all of them are "pipelined", and all of them use the same 4 ALUs, and all for of them complete in the same 1/2 cycle in the ALU, meaning it isnt any slower than any other ALU instruction:

ADD
ADC
SUB
SBC
MUL
DIV
SHL
SHR

all take exactly the same procedure, and exactly the same number of cycles to execute

I have an Athlon XP and SHR is at least 40 times faster than DIV.

[os64dev]

If you want to circumvent the speed issue then you can make a text line 128 characters wide (only 80 visible). Then your line is 256 bytes long and then low part (lower 8bits) of your offset register contains the modulo. This can be done with standard vga.

The benefits:
- Cariage return is as easy as clearing the lower 8bits.
- Line feed is adding one to the higher 8bits.