Two IDE compatibility controllers, which is which?

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Candy
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Two IDE compatibility controllers, which is which?

Post by Candy »

When I detect two PCI 1/1/128 devices they're two IDE controllers that only do compatibility mode. They include a BAR4 each. Which of the BAR4's maps to which set of registers and how do I find out?
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Post by Combuster »

I'm stabbing at the dark here since I have no experience with harddisks, but some ideas:

1:
Since they are PCI devices, you should be able to disable one and then probe which legacy range goes down with it.

2:
They probaby come in some order. One could expect that the device with the lowest slot number is the master and the second one the slave?
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Post by exkor »

BAR4 points to memory. There are 16 bytes in the memory that tell you which registers to use.
Description of 16 bytes can be found in 'ATA Host Adapter Standart" rev 1.0 (dated Jan 2003, its not proposal), section 6.7.
These are bus mastering registers, for DMA.

I got a question of my own. Got Intel P965 board and got BAR5 present - whats its purpose?
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Post by Candy »

exkor wrote:BAR4 points to memory. There are 16 bytes in the memory that tell you which registers to use.
Description of 16 bytes can be found in 'ATA Host Adapter Standart" rev 1.0 (dated Jan 2003, its not proposal), section 6.7.
These are bus mastering registers, for DMA.

I got a question of my own. Got Intel P965 board and got BAR5 present - whats its purpose?
Probably SATA. Just read the AHCI docs and the BAR5 is used for SATA.
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