PIO hard disk access

[Brendan]

Hi,

I wish I could use conditional jumps for branching like that but since conditional jumps are SHORT jumps and the code size when assembled exceeds the amount of opcodes a SHORT jump can jump over, it is not possible to use SHORT jumps in that code. So I have to short jump to a near label and then LONG jump to the end of the procedure.

The CPU itself supports both short conditional branches and near conditional branches, and most sane assemblers will either use the correct (short or near) conditional branch or provide some way to specify that you want a near jump instead of a short jump.

For example (for NASM) you could use "jb near foo" to specifically code a near jump, or use something like "nasm -O999" on the command line to enable optimizations (where NASM will automatically use near jumps when short jumps don't reach).

Of course other assemblers vary, but there's always a way (unless the assembler is broken, and doesn't support the full 80x86 instruction set).


Cheers,

Brendan

[XCHG]

That's awesome. I didn't even know x86 supported long conditional jumps. Thank you Brendan.

[xlq]

Another question: how can I clear the nIEN bit to receive interrupts? According to the T13 doc, it is in the "device control register", which has address A A N (0x1F6 for first controller), but that's the same address as the device register.

Edit: What? Wtf's it doing at 0x3F6?

[Pavia]

Another question: how can I clear the nIEN bit to receive interrupts? According to the T13 doc, it is in the "device control register", which has address A A N (0x1F6 for first controller), but that's the same address as the device register.

Edit: What? Wtf's it doing at 0x3F6?

nIEN bit you can found on Device Control register.

Control Block

Code: Select all

+---------------+-----+-----+-----+-----+-----+-----+-----+-----+
|Register       |  7  |  6  |  5  |  4  |  3  |  2  |  1  |  0  |
+---------------+-----+-----+-----+-----+-----+-----+-----+-----+
|Device Control | HOB |  r  |  r  |  r  |  r  | SRST| nIEN|  0  |
+---------------+-----+-----+-----+-----+-----+-----+-----+-----+

For legacy device 0x3F6, 0x376.
The register only write if you try to Read from it then get Alternate Status register.

[xlq]

yeah, thanks. I didn't have the actual port numbers when I started, only what the ATA/ATAPI-6 standard said - I practically had to guess. 0x3F6 is so far away from all the others, it wasn't immediately obvious