Octocontrabass wrote:
Anyway, according to the AMD manuals, in a 2MB page translation, the reserved bits are bits 7 and 8 in the PML5E and PML4E, nothing in the PDPE, and bits 13-20 in the PDE. The bits you are clearing are part of the physical address, and there is nothing reserved here. That is, the manual doesn't say what happens when you set unimplemented bits there, maybe the processor treats them as reserved bits, too.
Ahh, I see, I must have misread the wiki.
Anyway, I finally figured it out, somewhere when I was testing I was setting the huge page bit to 1 manually in the function
create_page_table_entry(...) this is what was causing the reserved bits to be set.
Thank you to everyone for your help
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